The present invention relates to a semiconductor device including a silicon nitride film containing chlorine and a method of manufacturing the same.
With progress in the degree of integration and fineness of the semiconductor device, a semiconductor device of the next era makes it absolutely necessary to develop a process technology that permits forming an interlayer insulating film (SiO2 film) having a finer contact hole of a higher aspect ratio, that permits forming a uniform silicon nitride film of a high step coverage within the contact hole made in the interlayer insulating layer, and that permits polishing the silicon nitride film by a chemical mechanical polishing (CMP) to achieve a buried shape of the silicon nitride film as designed and having a high flatness.
The particular technology is employed in the case of forming a device structure as shown in, for example, FIG. 33 showing a cross section in a direction perpendicular to the longitudinal direction of the channel of a MOS transistor included in a DRAM cell.
In the structure shown in FIG. 33, a drain diffusion layer 682 is formed in a surface region of a silicon substrate 681. Also, an interlayer insulating film (SiO2 film) 685 is formed on the surface of the silicon substrate 681. A contact hole 683 and a wiring trench 684 connected to the drain diffusion layer 682 through the contact hole 683 are formed in the interlayer insulating film 685.
A buried wiring 686 made of tungsten is formed to fill the contact hole 683 and a lower portion of the wiring trench 684. Also, a silicon nitride film 687 is formed on the side walls of the contact hole 683 and the lower portion of the wiring trench 684.
The buried wiring 686 is formed to fill completely the contact hole 683 and to fill only the lower portion of the wiring trench 684. An upper portion of the wiring trench 684, which is not filled with the buried wiring 686, is filled with a silicon nitride film 688. The silicon nitride film 688 of this kind is called a cap insulating film. The cap insulating film is intended to prevent short-circuiting between a lower capacitor electrode 689 formed on the cap insulating film and the buried wiring 686.
The cap insulating film is used as a mask in the step of forming by RIE (Reactive Ion Etching) a contact hole for the capacitor, i.e., a contact hole for connecting the lower capacitor electrode to an n+-type source diffusion layer, in the interlayer insulating film (SiO2 film) 685. Therefore, the silicon nitride film 688, which exhibits a high selectivity ratio, is used as the cap insulating film.
A Ti/TiN laminate film 690 is formed as a barrier metal film at the bottom of the contact hole 683 so as to prevent reaction between the drain diffusion layer 682 and the buried wiring 686 in the subsequent heat treating step.
Where the wiring trench 684 has an aspect ratio not smaller than 1, it was customary to form the silicon nitride film (DCS-SiN film) 688 by a low pressure chemical vapor deposition method (LPCVD method), which is a CVD method having a good step coverage and performed by using dichlorosilane (DCS) as the Si raw material.
However, the conventional method described above gives rise to problems as pointed out below.
First of all, a ratio of the polishing rate by CMP of the interlayer insulating film (SiO2) 685 to the DCS-SiN film 688 is about 30, which is not sufficiently high. Therefore, in the step of removing by CMP an excess DCS-SiN film 688 outside the wiring trench 684, the interlayer insulating film 685 fails to perform the function of a stopper. As a result, the DCS-SiN film 688 is excessively polished. In this case, the thickness of the DCS-SiN film 688 is rendered thinner than the design value, as shown in FIG. 34, giving rise to problems. For example, leakage current between the buried wiring 686 and the lower capacitor electrode 689 is increased. Also, the breakdown voltage is lowered.
What should also be noted is that, in forming the contact hole for the capacitor by etching, the DCS-SiN film 688 is used as a mask. If the DCS-SiN film 688 is excessively polished, short-circuiting is brought about in the worst case between the buried wiring 686 and the lower capacitor electrode 689, as shown in FIG. 35.
In recent years, demands for an improvement in the degree of integration and operating speed of a semiconductor device are on a sharp increase. To meet these demands, vigorous efforts are being made in an attempt to shorten the distance between adjacent device elements and to miniaturize the device element. At the same time, vigorous studies are being made in an attempt to decrease the resistance of the buried wiring and to diminish the parasitic capacitance.
In, for example, DRAM, the degree of integration is prominently increased. Therefore, in forming a contact hole, it is necessary to form a narrow stepped shape having a large aspect ratio. To meet this requirement, a silicon nitride film (SiN film) having a high selectivity ratio has come to be used in, for example, DRAM as an etching stopper film in forming a contact hole in an interlayer insulating film (e.g., TEOS oxide film) by RIE.
It is necessary for the SiN film used as an etching stopper film (RIE stopper film) of this kind to exhibit a selectivity ratio for RIE that is sufficiently high relative to an oxide film such as a BPSG film or a TEOS film. Further, in accordance with progress in the degree of integration and miniaturization of the device element, it is necessary to cover homogeneously and uniformly a narrow stepped shape having a severer aspect ratio.
To meet these requirements, it was customary in forming a contact hole to use as a RIE stopper film a relatively dense SiN film formed by the LPCVD method at about 780xc2x0 C. by using dichlorosilane (DCS) and ammonia as raw materials. Where a TEOS film is etched by RIE, the RIE selectivity of the TEOS film relative to the SiN film thus formed is as high as about 7, and the SiN film was found to exhibit a permittivity of about 7.5. However, the permittivity of 7.5 is relatively large. Particularly, the capacitance between adjacent wirings or the RC delay time of the entire device element are greatly dependent in recent years on the capacitance of the RIE stopper film in accordance with miniaturization of the device element. As a matter of fact, the capacitance of the RIE stopper film appears as a delay in the operating speed of the device element in a DRAM of the 0.18 micron era et seq.
Also, use of the SiN film as a RIE stopper film leads to an increased bit line capacitance. In order to make up for the increased bit line capacitance, it is necessary to prepare a capacitor having a large capacitance, leading to disadvantages in the characteristics of the device.
Further, in the case of using a SiN film as a RIE stopper film, the conditions for RIE must be changed to those adapted for etching the SiN film after formation of an opening by etching in an oxide film such as a BPSG film or a TEOS film. It should be noted in this connection that the opening has a large aspect ratio and a small diameter, giving rise to various problems. For example, the SiN film at the bottom of the opening cannot be removed by RIE uniformly over the entire planar region, with the result that the residue of the SiN film tends to remain on the bottom portion. Also, since the silicon substrate is directly exposed to RIE, damages done to the substrate are worried about. In this case, an over-etching cannot be performed sufficiently and, thus, the SiN film partly remains unremoved, giving rise to a possibility that an unsatisfactory electrical contact will be brought about.
In the next step, a treatment with a dilute hydrofluoric acid is carried out for removing the native oxide film in the contact portion. What should be noted is that the etching rate of the DCS-SiN film formed at 780xc2x0 C. by using dichlorosilane (DCS) as a raw material is 0.2 nm/min when etched with a dilute hydrofluoric acid ({fraction (1/200)}) in contrast to about 1 nm/min for the native oxide film. Since the etching rate of the DCS-SiN film is low, the native oxide film fails to be removed in the etching step with the dilute hydrofluoric acid.
On the other hand, a high processing speed is required for a logic device, making it necessary to decrease the so-called xe2x80x9cRC delay timexe2x80x9d, i.e., to decrease the capacitance between adjacent wirings and the wiring resistance. For decreasing the wiring resistance, use of copper for forming the metal wiring is being studied. For using a copper wiring, a barrier layer is required for preventing oxidation of the copper wiring and for preventing diffusion of copper within the copper wiring. Use of a SiN layer is now under study as one of the barrier layers.
FIG. 36 exemplifies a structure in which a SiN film is formed as a barrier layer on a Cu wiring. The structure shown in the drawing includes a TEOS oxide film 701, a TaN film 702, a Cu wiring 703 and a SiN film 704. Even in the case of employing the Cu wiring technology, an Al wiring is partly used in the narrow pitch portion between adjacent wirings in order to decrease the RC component between adjacent wirings. Therefore, it is necessary for the SiN film 704 to be formed in the subsequent step at a temperature not exceeding the Al reflowing temperature of 450xc2x0 C. Also, the interlayer insulating film that is already formed in the step of forming the wiring is formed of a low permittivity film (generally called low-k film) such as a film of FSG (Fluorine-added Silicate Glass) in order to decrease the permittivity. Since these films are formed at a low temperature, i.e., not higher than 400xc2x0 C., cracks tend to be generated at temperatures not lower than 450xc2x0 C. Such being the situation, the SiN film 705 must be formed at low temperatures not higher than 450xc2x0 C. In general, the SiN film 705 is formed by a plasma CVD which can be easily performed at low temperatures.
In a semiconductor device, the aspect ratio of the device element separating trench and the concave portion between gate electrodes tends to be increased in accordance with miniaturization of the device element. With increase in the aspect ratio, it gradually becomes difficult to bury an insulating film such as a silicon oxide film within the trench without forming a so-called xe2x80x9cvoidxe2x80x9d.
Under the circumstances, use of an HDP (High-Density Plasma)-CVD method or a TEOS-O3 series CVD method is being tried. However, the former method gives rise to problems such as a plasma damage done to the underlying layer, a nonuniformity in the film quality and a low through-put. Also, the latter method gives rise to the problem that a heat treatment at a high temperature is required for improving the film quality after the film formation.
As described above, an LPCVD method using dichlorosilane as a Si raw material is proposed as a method for forming a silicon nitride film that is buried in a wiring trench.
However, a ratio in the polishing rate by CMP of the interlayer insulating film (SiO2) to the silicon nitride film (DCS-SiN film) formed by this method is about 30. As a result, the DCS-SiN film is excessively etched in the step of removing by CMP the excess DCS-SiN film outside the wiring trench so as to increase the leakage current between the buried wiring and the lower capacitor electrode.
An object of the present invention, which has been achieved in view of the situation described above, is to provide a semiconductor device including a silicon nitride film having a step coverage substantially equal to that of the conventional silicon nitride film and exhibiting a sufficiently large selectivity ratio relative to a silicon oxide film, and a method of manufacturing the particular semiconductor device.
According to a first aspect of the present invention, there is provided a semiconductor device including a silicon nitride film having a chlorine concentration of at least 4xc3x971020 cmxe2x88x923.
According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the step of forming a silicon nitride film having a chlorine concentration of at least 4xc3x971020 cmxe2x88x923 by an LPCVD method using a compound having a Sixe2x80x94Si bond and a Sixe2x80x94Cl bond as a Si raw material.
Further, according to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of forming on a semiconductor substrate having a diffusion layer formed in a surface region thereof an insulating film having a wiring trench and a contact hole positioned below said wiring trench and connected to said diffusion layer; forming a barrier metal layer on the surface of said diffusion layer; forming a buried wiring filling the contact hole and also filling a lower portion of the wiring trench, said buried wiring being electrically connected to the diffusion layer; forming a silicon nitride film on the entire surface including the wiring trench in a manner to fill the upper portion of the wiring trench; and removing the silicon nitride film positioned outside the wiring trench.
The specific construction of the present invention is as follows:
(1) The silicon nitride film contains an excessive amount of silicon.
(2) The nitrogen/silicon ratio of the silicon nitride film is smaller than 1.33, which is smaller than the stoichiometric ratio of Si3N4.
(3) The silicon nitride film is formed inside the wiring trench having a high aspect ratio. Specifically, the aspect ratio of the wiring trench is not smaller than 1.
(4) The silicon nitride film having a chlorine concentration of at least 4xc3x971020 cmxe2x88x923 is formed by an LPCVD method using a compound having a Sixe2x80x94Si bond and a Sixe2x80x94Cl bond as a Si raw material. Specifically, the Si raw material is represented by SinCl2n+2, where n is 2 or more, or SinCl2nxe2x88x922Hx, where n is 2 or more, and x is 2n+2 or less. Particularly, it is desirable to use Si2Cl6 as the Si raw material. Also, NH3 is used as the nitrogen source.
(5) The chlorine concentration of the silicon nitride film can be set at 4xc3x971020 cmxe2x88x923 or more by forming the silicon nitride film at a temperature not higher than 700xc2x0 C.
(6) A laminate structure consisting of a Ti film and a TiN film is used as a barrier metal film, and the film-forming temperature of the silicon nitride film is set at 700xc2x0 C. or less. Also, the wiring trench has a high aspect ratio, i.e., not smaller than 1.
It has been found as a result of the research conducted by the present inventors that, if a compound having a Sixe2x80x94Si bond and a Sixe2x80x94Cl bond such as Si2Cl6 is used as the Si raw material in the LPCVD method for forming a silicon nitride film, it is possible to form a silicon nitride film exhibiting a selectivity ratio relative to a silicon oxide film in respect of the polishing and etching. Also, the step coverage remains unchanged because the LPCVD method satisfactory in step coverage is employed in the method of the present invention.
It has also been found that, in the case of using the Si raw material noted above, the silicon nitride film can be formed at a sufficiently high film-forming rate even if the film is formed at a low temperature not higher than 700xc2x0 C., making it possible to use a laminate structure of Ti/TiN film as the barrier metal film. Also, the chlorine concentration of the silicon nitride film formed by using the Si raw material noted above at the film-forming temperature noted above has been found to be not lower than 4xc3x971020 cmxe2x88x923.
It should also be noted that, if the silicon nitride film is formed at a temperature not higher than 600xc2x0 C., it is possible to obtain a silicon nitride film containing an excess silicon. The silicon nitride film of this kind is low in density and, thus, can be polished at a rate higher than that of the silicon oxide film.
As described above, the DCS-SiN film used as a RIE stopper is satisfactory in the step coverage and the etching selectivity. However, the etching rate of the DCS-SiN film is not high enough to be removed completely when etched with a dilute hydrofluoric acid in the step of removing the native oxide film. Also, in view of decrease of the capacitance between adjacent wirings, the DSC-SiN film gives rise to a problem that the permittivity of the DSC-SiN film is relatively large.
Incidentally, a plasma SiN film formed as a barrier film of the Cu wiring by a plasma CVD using silane (SiH4) and ammonia (NH3) as raw materials has a relatively large permittivity of about 7. Also, a plasma SiN film formed at 370xc2x0 C. was subjected to a high temperature bias test under 100xc2x0 C. and 1 MV/cm by using a Cu electrode. It has been found that the thickness of the SiN diffusion-oxidation barrier film relative to Cu, which is required for maintaining a sufficiently high insulation breakdown voltage, is about 100 nm. However, if a SiN film having such a large permittivity is formed in a thickness of 100 nm in the wiring portion, the capacitance between adjacent wirings is markedly increased so as to impair the device characteristics.
Another object of the present invention, which has been achieved in view of the situation described above, is to provide a semiconductor device including a silicon nitride film substantially equal to the prior art in the step coverage and the etching selectivity, low in permittivity, high in etching rate when etched with a dilute hydrofluoric acid, and used as an etching stopper film in etching a silicon oxide film, and a method of manufacturing the particular semiconductor device.
Another object of the present invention, which has been achieved in view of the situation described above, is to provide a semiconductor device including a silicon nitride film low in permittivity and used as a barrier film for Cu, and a method of manufacturing the particular semiconductor device.
To achieve these objects, the semiconductor device of the present invention is featured in that a silicon nitride film having a chlorine concentration of at least 1xc3x971021 cmxe2x88x923 is used as an etching stopper film or a barrier film.
Concerning the LPCVD method for forming a silicon nitride film, it has been found that, if a compound having a Sixe2x80x94Si bond and a Sixe2x80x94Cl bond such as Si2Cl6 is used as the Si raw material, it is possible to form a silicon nitride film exhibiting a sufficiently large etching selectivity relative to a silicon oxide film.
The chlorine concentration of the silicon nitride film formed by using the particular Si raw material has been found to be at least 1xc3x971021 cmxe2x88x923. Also, the step coverage has been found to be substantially equal to the prior art because an LPCVD method that permits achieving a good step coverage is employed in the method of the present invention. Further, in the case of using the particular Si raw material, it is possible to diminish the permittivity of the silicon nitride film, to increase the etching rate of the silicon nitride film when etched with a dilute hydrofluoric acid, and to improve the barrier properties of the silicon nitride film relative to Cu. These features of the present invention will be described hereinlater in detail in conjunction with the embodiments of the present invention.
As described above, it has become difficult to form a silicon nitride film excellent in burying properties in a concave portion having a high aspect ratio and in film characteristics in accordance with miniaturization of the device element.
Another object of the present invention is to provide a semiconductor device that permits forming a silicon nitride film excellent in burying properties and film characteristics in a concave portion having a high aspect ratio and a method of manufacturing the particular semiconductor device.
According to a fourth aspect of the present invention, which has been achieve in view of the situation described above, there is provided a method of manufacturing a semiconductor device, comprising the steps of forming a silicon nitride film over an entire region of a concave portion formed in an underlying layer region on the side of a main surface of a semiconductor substrate; and oxidizing said silicon nitride film to convert the silicon nitride film into a silicon oxide film so as to form an insulating region over the entire region within the concave portion.
According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein an insulating region is formed over an entire region of a concave portion formed in an underlying region on the side of a main surface of a semiconductor substrate by repeating a plurality of times in a film-forming direction the steps of forming a silicon nitride film within said concave portion and oxidizing said silicon nitride film to convert the silicon nitride film into a silicon oxide film.
Preferred embodiments of the manufacturing method of the present invention are as follows:
(1) The silicon nitride film contains at least one of phosphorus and boron, and a silicon oxide film containing at least one of phosphorus and boron is formed by oxidizing the silicon nitride film.
(2) The silicon oxide film contains chlorine in an amount of at least 1xc3x971019 cmxe2x88x923.
(3) The silicon nitride film contains chlorine in an amount of at least 9xc3x971020 cmxe2x88x923. It is desirable for the silicon nitride film to have a density not higher than 2.4 g/cm3 and a specific inductive capacity not larger than 7.3.
(4) The silicon nitride film is formed by an LPCVD method using a compound having a Sixe2x80x94Si bond and a Sixe2x80x94Cl bond as a raw material gas.
(5) The compound used in the LPCVD method is represented by SinCl2n+2 or SinCl2n+xe2x88x92xHx, where n is an integer of 2 or more, and x is an integer smaller than 2n+2. A typical example of the particular compound is hexachlorodisilane.
(6) The silicon nitride film is formed at a temperature lower than 450xc2x0 C.
The semiconductor device of the present invention is featured in that the device comprises an underlying region having a concave portion formed on the side of a main surface of the semiconductor substrate and a silicon oxide film containing chlorine, which is buried over the entire region of the concave portion of the underlying region.
In the present invention, a silicon nitride film, particularly, a silicon nitride film containing chlorine is oxidized for conversion into a silicon oxide film, with the result that a silicon oxide film is buried uniformly and homogeneously within the concave portion. It should also be noted that, even if the silicon nitride film includes a void, a silicon oxide film free from the void can be obtained because a volume expansion accompanies the conversion from the silicon nitride film into the silicon oxide film.
Further, since chlorine is contained in the silicon oxide film, the dangling bond present in the interface with another film can be terminated so as to decrease the leakage current.
Still further, the silicon oxide film containing chlorine is also allowed to contain at least one of phosphorus and boron so as to obtain additional effects that the gettering of impurities and selectivity ratio in the etching step are improved.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.